The present invention relates generally to a method of semiconductor fabrication, and more particularly, to a method of forming a polycrystalline silicon film by a plasma-assisted chemical vapor deposition (“CVD”) process.
In the fabrication of flat panel display (“FPD”) devices, thin film transistors (“TFTs”) and liquid crystal cells, metal interconnects and other features are formed by depositing and/or removing multiple layers of conducting, semi-conducting and dielectric materials from a glass substrate. One of the conventional methods for fabricating a polycrystalline silicon (hereinafter polysilicon) TFT is solid phase crystallization (“SPC”). In LCD devices, since a normal glass substrate can only work at a temperature below 600° C., fabricating a polysilicon film directly under a high temperature will make the glass substrate twisted. The SPC method overcomes the high temperature issue by using an expensive quartz substrate. However, only a small size LCD panel can be made. In a method called biased-enhanced nucleation (“BEN”), nucleation of diamond on Pt or Pt alloy substrates at high density is possible by applying a bias voltage to the substrate in a plasma atmosphere that includes carbon at the beginning of diamond CVD. In the BEN method, for diamond growth, known CVD methods, such as microwave plasma CVD, radio frequency plasma CVD, hot filament CVD, DC plasma CVD methods, plasma jet, combustion, thermal CVD and the like can be used. An example of the BEN method can be found in “Generation of Diamond Nuclei by Electric Field in Plasma Chemical Vapor Deposition” by Yugo et al., Appl. Phys. Lett., 58 (1991), 1036. The BEN method is effective because the substrate surface is quickly supersaturated with carbon-containing species as ions containing carbon atoms are attracted to the substrate by an electric field due to the bias, and thus diamond nuclei are more readily formed and grown.
A low temperature polycrystalline silicon (“LTPS”) process has been developed for manufacturing the TFT array of liquid crystal display (“LCD”) devices. The low temperature polysilicon has the characteristic of faster electron mobility than the amorphous silicon (a-Si) over approximately 100 times. Consequently, each pixel of low temperature polysilicon has a faster response time and smaller outlined dimension compared with amorphous silicon.
Conventional methods for fabricating polysilicon TFTs at low temperature may include excimer laser annealing (“ELA”) and CVD processes. The ELA method requires a lower crystallization temperature than the SPC method. However, the transient temperature provided by a laser may damage a polymeric substrate. Since polymeric substrates are used more often than glass substrates, the ELA method may still have a temperature issue. Furthermore, the ELA method may not be cost efficient in mass production because ELA equipment is expensive.
In the CVD method, a low temperature polysilicon film is formed by crystallizing an amorphous silicon film. Processing techniques used to create the TFT devices may include plasma-enhanced chemical vapor deposition (“PECVD”) and the like. Plasma processing may be well suited for the production of TFT devices because of the relatively lower processing temperatures required to deposit films and the good film quality which results from plasma processes. Examples of the CVD method can be found in “Structural Properties of Polycrystalline Silicon Films Prepared at Low Temperature by Plasma Vapor Deposition” by Kakinuma et al., J. Appl. Phys., 70 (1991), 7374, and “Study of Polycrystalline Silicon Films Deposited by Inductive Couple Plasma Chemical Vapor Deposition” by Won et al., Journal of the Korean Physical Society, Vol. 39, 123˜126 (2001). Although the CVD method may appear more advantageous than the SPC and ELA methods, published research papers have indicated that in the CVD method a polycrystalline silicon state of a film cannot be achieved until an amorphous incubation layer of approximately 100 to 1000 angstroms (Å) of the film is grown, which disadvantageously requires a longer fabrication time. The CVD method may be generally used for fabricating top-gate TFT devices. However, it is not suggested to fabricate bottom-gate TFT devices with the CVD method. A bottom-gate TFT device thus fabricated may suffer from threshold voltage (VTH) shift due to stress, resulting in an early degradation. The CVD method therefore is not suitable for use in the fabrication of organic light emitting diodes (OLEDs). Furthermore, the CVD method may have a relatively low deposition rate of, for example, approximately 0.1 to 1 Å/sec, resulting in an undesirable throughput.
It is therefore desirable to have a method for fabricating polysilicon films that overcomes the disadvantages of the above-mentioned conventional methods in order to obtain a larger production yield, better uniformity over larger surfaces and thinner deposition layers.